VirtualMask™
You know how this goes, right? We tell you just enough to get you excited but not enough that you know our 'secret sauce'. We are more than happy to meet and explain in detail why and how we know we can do what we claim here eliminate OPC, optical lithography and masks from your SoC designs, saving you millions of dollars and months of cycle time and still give you complex, leading edge chips at aggressive geometries.
If you are designing an SoC for 65/45nm and you need rapid prototypes and/or volumes less than 100,000 chips, talk to us. You just might save significant time and money!
E-Beam News
SCD Source: Startup preps e-beam lithography for SoCs and ASICs
EE Times: Fujitsu, Advantest form e-beam venture
EE Times: E-beam litho ready to rise again, says Vistec
EE Times: Startup Multibeam enters maskless lithography race
Semiconductor International: Mapper Demos Massively Parallel E-Beam Lithography